The present invention relates to a method for a data processing system having address conversion and using a translation memory for translated address pairs of virtual and real addresses for memory pages wherein internal control of the data processing system is improved.
Data processing systems with address translation frequently include what is known as a xe2x80x9cTranslation Lookaside Bufferxe2x80x9d (TLB) as a translation memory, in which pairs of virtual and real addresses that are acquired in a translation are temporarily stored together with control information so that it is not necessary to always run through the full translation routine in order to acquire the real addresses to a virtual address.
Besides an identifier of the validity by means of a control bit V, what is known as a xe2x80x9cdirty bitxe2x80x9d D, which forms the sole write protection mechanism, frequently belongs to the control information. In the bit""s ON condition, a description of the pertaining user page is allowed. On the other hand, when a write access occurs in the OFF condition, then what is known as a xe2x80x9cTLB modified exceptionxe2x80x9d is triggered. In the context of the routine thus initiated, it is then checked with the aid of additional control data in the pertaining page table entry whether or not there is a real violation of the write protection from the standpoint of the operating system. (see, e.g., xe2x80x9cMIPS RM4000 User""s Manualxe2x80x9d (Joseph Heinrich, Prentice Hall, 1993: 62ff)).
In light of the foregoing, the present invention seeks to so define the possibilities for internal controlling of the system, given write protection, that, given a small control outlay, the advantages of such write possibilities can be exploited in pages that are inherently protected.
This is achieved by the present invention in that the internal control is additionally permitted to write on write-protected user pages as well. In this way stored data can be corrected, or new program code that is shared by several tasks can be written from the system side. To accomplish this, the write protection is temporarily dropped. In order that the write protection for the relevant pages can be restored subsequent to the execution of the write accesses with system authorization, a marking is accomplished using separate indicators.
According to further aspects of the invention, the check for the presence of write accesses with system authorization is advantageously integrated into the previously existing sequence for handling the interrupt request in write-protected pages, wherein a setting of the control bit for temporary storing by the internal control of the system makes possible a repeating of the write access, as well as additional accesses, without a new interrupt request being triggered.
The write authorization for the system is dropped when the operating mode is changed from the system to the user, respectively, in that it is first checked whether one of the control bits that forms the indicators is set. Given a set control bit for a globally used page, then all address entries in the translator memory that are related to globally used pages and whose control bit for the write authorization is set are declared invalid. On the other hand, given a set bit for a page that is used task-locally, all entries for the related task are declared invalid. This can be accomplished easily by changing the appertaining address space identifier ASID.
Additional advantages and novel features of the invention will be set forth in part in the description that follows and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The advantages of the invention may be realized and attained by means of the instrumentalities and combinations particlarly pointed out in the appended claims.